Silicon carbide (below, indicated as “SiC”) is excellent in heat resistance and mechanical strength and is physically and chemically stable, so draws attention as an environmentally resistant semiconductor material. Further, in recent years, demand for epitaxial SiC wafers as substrates for high-frequency and high-voltage resistant electronic devices has been rising.
When using an SiC monocrystalline substrate (below, referred to as a “SiC substrate”) to fabricate a power device, high-frequency device, etc., normally an SiC thin film is formed on the SiC substrate using the method referred to as thermal CVD (thermal chemical vapor deposition) by epitaxial growth or a dopant is directly implanted by the ion implantation method. However, in the latter case, annealing at a high temperature becomes necessary after implantation, so thin film formation by epitaxial growth is frequently used.
When growing an epitaxial film of the SiC, if there is a disturbance in crystals at the SiC substrate surface, stacking faults due to the disturbance are formed in the epitaxial film, so the epitaxial film contains normal epitaxial defects referred to as “stacking faults”. The balance between the stacking faults and the epitaxial defects determines the effects on an electronic device formed on the epitaxial silicon carbide wafer, that is, the performance of the epitaxial silicon carbide wafer.
As the epitaxial defects, triangle defects, carrot defects, comet defects, etc. are known as typical defects. If these are present inside the device, they act as so-called “killer defects” degrading the device properties or performance, so reduction of these is strongly sought. At the present time, the epitaxial defects are of the level of several defects to 10 or so defects per cm2, but the number of epitaxial defects contained in the device has to be substantially zero. Therefore, at the present time, a yield of production of devices having areas larger than 5 mm square or so drops sharply and it is difficult to produce these devices.
In recent years, structural analysis of triangle defects and carrot defects has been developed. The causes for the formations of these defects have been revealed (see NPLT 1). It has been learned that comet defects are formed in 3C—SiC, but the causes for the comet defects are unclear on many points (see NPLT 2). Furthermore, half or so of the epitaxial defects are comet defects. They tend to occupy greater areas than other defects, so measures which reduce the comet defects have to be quickly established. Although epitaxial SiC wafers is expected to be applied to devices in the future, in particular if not reducing the comet defects, while devices with relatively small areas can be fabricated, it is difficult to handle the large sized devices having areas of 5 mm square or so or more.
PLT 1 is characterized by raising the temperature of the SiC substrate under an argon atmosphere up to the epitaxial growth temperature to treat the substrate surface with argon under conditions of a reaction chamber to which the supply of carbon is suppressed and thereby suppress Si droplets. PLT 2 is characterized by heat treating silicon carbide substrate at 1700° C. to 2200° C. in an inert gas atmosphere or vacuum to convert the front end parts of the basal plane dislocations of the silicon carbide substrate to threading edge dislocations to thereby more reliably convert basal plane dislocations to through threading edge dislocations.
PLT 3 is characterized by polishing a 4H—SiC monocrystalline substrate slanted by a 0.4° to 5° off-angle, making the polished substrate 1400 to 1600° C. under a hydrogen atmosphere, and cleaning the surface to thereby suppress the occurrence of step bunching.
PLT 4 is characterized by annealing a silicon carbide bulk substrate with a slant angle from the <0001> plane smaller than 5° in a reducing gas atmosphere under conditions of a predetermined temperature and predetermined processing time and lowering the substrate temperature in the reducing gas atmosphere to reduce the density of carrot defects and triangle defects.
As explained above, the balance of the stacking faults and the epitaxial defects determines the performance of an epitaxial silicon carbide wafer. However, the inventions disclosed in PLTs 1 to 4 were made focusing on only suppression of triangle defects, carrot defects, and other epitaxial defects or on flatness of the SiC epitaxial film, and the inventions were insufficient in effect of reduction of stacking faults.